Search - vhdl ROM

[VHDL-FPGA-Verilog] VHDL CPU部件

Description: 包括一个简单的ALU和一些寄存器、ROM的设计。有一些以TXT文件格式存在，用的时候只要改一下格式即可。
Platform: | Size: 155537 | Author: terminatorsong@gmail.com | Hits:

[VHDL-FPGA-Verilog] datarom

Description: 该源码为几个正弦ROM,已经编译并通过,可以直接下载,不需要,内部含有正弦ROM表,还有ROM的宏模块-the source for several sine ROM, has been compiled and passed, can be directly downloaded, not internal ROM containing sine table, the Acer ROM module
Platform: | Size: 243712 | Author: 刘恒辉 | Hits:

[VHDL-FPGA-Verilog] LED点阵

Description: 大屏幕led点阵显示的驱动时序。使用vhdl语言描述。其中rom文件可以使用lpm_megcore自动生成。-big screen led to the dot matrix display driver timing. The use of VHDL description language. Rom which documents can be automatically generated using lpm_megcore.
Platform: | Size: 4096 | Author: 王卫 | Hits:

[VHDL-FPGA-Verilog] VHDL语言100例详解

Description: VHDL语言100例详解。详细讲解了用VHDL语言进行数字电路和数字系统设计的知识。用100个实例，不仅进行基础的门电路设计，而且还有较为复杂的数字系统设计。这些实例可以直接被调用。-VHDL Elaborates on 100 cases. Detailed account of VHDL for digital circuits and digital systems design knowledge. With 100 examples, not only for infrastructure gate design, but also more complex digital system design. These examples can be called.
Platform: | Size: 6633472 | Author: 穆群生 | Hits:

[VHDL-FPGA-Verilog] jop_rom

Description: JOP的RAM VHDL源码，经典的经典，不易找到的好东东，-JOP of RAM VHDL source code, classic classics, difficult to find a good price.
Platform: | Size: 4096 | Author: 黄肖超 | Hits:

[VHDL-FPGA-Verilog] MVHDL

Description: 本程式為並列flash ROM之控制程式, 可將flash rom的資料讀出後, 經過CPLD controller將圖檔轉成VESA影像訊號, 輸出至螢幕, 本程式已經過硬體驗證-the parallel program for controlling flash ROM programs, rom flash can be read out information, After drawing CPLD controller will turn into VESA video signal and output to screen. The program has strong experience card
Platform: | Size: 4977664 | Author: 明華 | Hits:

[Communication-Mobile] GetRomData

Description: 生成4种方式的DDS输出的读表程序的VHDL源代码程序。-four ways generation of DDS output of the meter reading procedures VHDL source code procedures.
Platform: | Size: 176128 | Author: zhao | Hits:

[Books] rommatlab

Description: 错误检测与纠正电路的设计与实现用VHDL语言在CPLD上实现串行通信.doc-error detection and correction circuit design and implementation using VHDL on the CPLD serial communications. D oc
Platform: | Size: 212992 | Author: 1 | Hits:

[VHDL-FPGA-Verilog] ram

Description: 本原代码中利用VHDL语言编写了RAM、FIFO、ROM等常用的存储和缓冲部件，完全的代码在ALTERA的FPGA上已经通过仿真测试，保证可用.-primitive code using VHDL prepared RAM, FIFO, ROM, and other commonly used storage and buffer components, complete code in the Altera FPGA simulation test has been passed to ensure that available.
Platform: | Size: 2048 | Author: nick | Hits:

[Other] rom2

Description: vhdl rom 程序，标准的rom程序，很简单-vhdl rom procedures rom standard procedures, is very simple
Platform: | Size: 1024 | Author: gcy | Hits:

[Embeded-SCM Develop] CPLD234

Description: 文档中给出了使用VHDL编写的频率的精确测量方法的代码,同时还有cPLD与e2rom等的接口代码-Document given the frequency of the use of VHDL to prepare precise measurement method of the code, along with e2rom CPLD interface code, etc.
Platform: | Size: 223232 | Author: qibinchuan | Hits:

[VHDL-FPGA-Verilog] dds_8bit

Description: rom地址宽度8位，256个正弦波数据。频率控制字可以步进，具有清零功能。-rom address the width of 8, 256 sine wave data. Frequency control word can step has cleared function.
Platform: | Size: 352256 | Author: eroad | Hits:

[VHDL-FPGA-Verilog] rom

Description: 一个 16×8bit 的ROM程序包括程序的初始化。-A 16 × 8bit the ROM initialization procedures, including procedures.
Platform: | Size: 3072 | Author: h13978699183 | Hits:

[VHDL-FPGA-Verilog] rom

Description: 基于vhdl的rom的描述,经过确定测试通过.-Based on the VHDL description of the rom, after determining the test.
Platform: | Size: 1024 | Author: stone | Hits:

[VHDL-FPGA-Verilog] 64×8bitROM

Description: 64×8bit 的ROM设计，VHDL语言，在ISE可以运行。-64 × 8bit the ROM design, VHDL language, can run in the ISE.
Platform: | Size: 4096 | Author: 张军 | Hits:

[VHDL-FPGA-Verilog] rom

Description: 我用VHDL写的正弦，用FPGA内部ROM，有仿真testbench,在quartus里可以运行。在板子里已经验证-I used to write VHDL sinusoidal, using FPGA internal ROM, has simulation testbench, you can run in Quartus. Yard has already been verified in the plates
Platform: | Size: 651264 | Author: jimmy | Hits:

[VHDL-FPGA-Verilog] VHDL-ROM4

Description: 基于ROM的正弦波发生器的设计：1.正弦发生器由波形数据存储模块（ROM），波形发生器控制模块及锁存模块组成 2.波形数据存储模块（ROM）定制数据宽度为8，地址宽度为6，可存储 64点正弦波形数据，用MATLAB求出波形数据。 3.将50MHz作为输入时钟。 -ROM-based design of the sine wave generator: 1. Sinusoidal waveform generator by the data storage module (ROM), waveform generator control module and latch module 2. Waveform data storage module (ROM) custom data width of 8 , address width of 6, can store 64 points sinusoidal waveform data, waveform data are obtained using MATLAB. 3. To 50MHz clock as input.
Platform: | Size: 98304 | Author: 宫逢源 | Hits:

[Other] rom

Description: 根据实验要求，对rom和ram进行验证，实现各项功能。-According to the experimental requirements of rom and ram for authentication, the realization of various functions.
Platform: | Size: 70656 | Author: cgrcgh | Hits:

[Other] rom

Description: Turbo码编码器的Rom宏模块，此模块中包含Rom.v文件和存储交织地址的.mif文件-Turbo code encoder Rom macro module, this module contains intertwined Rom.v documents and store addresses. Mif file
Platform: | Size: 9216 | Author: sunhao | Hits:

[SCM] rom

Description: Rom的读取的Verilog代码，自己编写的，大家参考参考啊-Rom read the Verilog code, I have written, your information ah
Platform: | Size: 1024 | Author: keke | Hits:

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[VHDL-FPGA-Verilog] VHDL CPU部件

[VHDL-FPGA-Verilog] datarom

[VHDL-FPGA-Verilog] LED点阵

[VHDL-FPGA-Verilog] VHDL语言100例详解

[VHDL-FPGA-Verilog] jop_rom

[VHDL-FPGA-Verilog] MVHDL

[Communication-Mobile] GetRomData

[Books] rommatlab

[VHDL-FPGA-Verilog] ram

[Other] rom2

[Embeded-SCM Develop] CPLD234

[VHDL-FPGA-Verilog] dds_8bit

[VHDL-FPGA-Verilog] rom

[VHDL-FPGA-Verilog] rom

[VHDL-FPGA-Verilog] 64×8bitROM

[VHDL-FPGA-Verilog] rom

[VHDL-FPGA-Verilog] VHDL-ROM4

[Other] rom

[Other] rom

[SCM] rom

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